As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to users is information handling systems. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information may be processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems.
High current information handling system loads, such as for CPUs and memory, typically require multi-phase voltage regulators (VRs). An integrated power stage (IPstage) of each VR phase is an integrated circuit that is usually composed of a MOSFET (metal oxide semiconductor field effect transistor) driver, a high-side MOSFET, and a low-side MOSFET. In addition to an IPstage, a VR phase also usually includes an inductor with all the phase inductors being tied together at their output. One example of a multi-phase VR architecture may be found in U.S. Pat. No. 7,999,520.
Generally, each MOSFET supplier for integrated power stages uses a different silicon process for fabrication. Different silicon processes result in a different MOSFET drain to source resistance in on-state or RDS(on) characteristics as a function of gate drive voltage, i.e., gate-to-source voltage (VGS). As illustrated in FIG. 1, at a given temperature, a MOSFET 1 device from a first supplier may exhibit a RDS(on) versus VGS curve that enters a relatively flat region after VGS=5 volts while a greater VGS of about 6 volts is required before a MOSFET 2 device from a second supplier enters a relatively flat region of RDS(on) versus VGS. Thus, voltage regulator (VR) efficiency using MOSFET 1 device won't benefit from a greater gate voltage (e.g., 5 volts) because RDS(on) will remains almost the same at higher voltages, but gate switching loss may be significantly increased, depending on equivalent charge capacitance at the gate.
An optimized FET drive voltage in terms of better efficiency is determined mainly by the selected MOSFET RDS(on) characteristic, gate charge and switching frequency. For instance, a lower drive voltage may be considered for a higher switching frequency, lower gate charge FET and higher density design VR, or gate charge/discharge switching loss will become a significant portion of total power loss. In the past, a single VR FET drive voltage value for a given server system has been selected based on the average of different optimal FET drive voltages determined for multiple types of MOSFET devices available from different suppliers that may be employed in the VR of the server system.
Discrete power stages (separate dual FET and FET driver packages) have been traditionally used for main-stream server systems, and inductor direct current resistance (DCR) current sense is employed. Smart power stages have been used for servers. There are two categories of current sense approaches being used in IPstages, i.e., mirror FET sense and RDS(on) sense.